The present invention relates to an electronic computer including a device for controlling jumps in microprograms, comprising a central unit controlled by the microprograms. The central unit comprises a plurality of bistable circuits for memorizing predetermined binary conditions of the microprograms, and means for transferring the predetermined conditions into the bistable circuits.
It is known during the development of microprograms it is often necessary to analyze conditions generated by particular microinstructions to condition the development of the microprogram itself, i.e. to determine whether or not jumps are to take place.
For example, microinstructions of logical type, (AND, OR, exclusive OR, etc.), memorize in particular registers of the central unit the result of the executed logical operation. Such a result is composed of one bit which takes one of the two possible logical values corresponding to the result obtained. In particular, if the operation carried out by the microinstruction is an exclusive OR between two words of eight bits, the result may be 0 or 1 according to whether the two words are the same or different, respectively. Such a result as stated is memorized by the microinstruction directly into a special flip-flop or register at a cell allocated in the central unit.
Another case which frequently occurs is that of having to analyze, during the development of a microprogram, the content of particular words, for example words of eight bits, which specify particular conditions of the program during its execution. Such words are normally compiled from instructions of the program or else by the effect of a command from the computer console.
With each bit in such a word there is associated information significant for execution of the microprogram. This involves, therefore, the need to be able to determine the logical level reached by them. In order to do this, the technique usually employed is to transfer into a register of the central unit the entire word, to zeroize by means of a so-called "mask" all the bits except those whose logical level it is desired to test, and then to analyze those bits by means of an AND microinstruction.
For example, if it is desired to analyze the third bit of a word, the latter is transferred to a register, an AND microinstruction is carried out between the word registered in it and a marked word which has the third bit at the level 1 and all the other bits at the level 0. Consequently the result of the AND is a bit which takes the level 1 or 0 according to whether the third bit of the word being analyzed is at the level 1 to 0 respectively.
Such a bit is memorized as already stated by a flip-flop of the central unit, and is then analyzed by special microinstructions for conditioning jumps which test the content of such a flip-flop for carrying out or leading the jump to a predetermined address. It is evident that this kind of technique has the disadvantage of being slow and laborious.
In a known computer, such as that disclosed in U.S. Pat. No. 3,793,631, there is provided an eight bit designator register adapted for storing five particular conditions reached in the course of the program and having a group bit manipulation instructions for setting or resetting an addressed bit of the register. These bits are: zero, positive link, overflow and flag. The limitation of this device becomes apparent during the execution of a BRANCH instruction. In fact, only the FLAG bit is directly testable by the BRANCH instruction while the other bits of the register, previously requires the execution of one of the following instructions:
Set flag if bit true PA1 set flag if bit false PA1 reset flag if bit true PA1 reset flag if bit false PA1 Set flag if bit true PA1 branch on flag true.
it follows that the execution of a jump instruction on a condition specified by a bit different from the FLAG bit requires two instructions: